Tutorial :Random number generation on Spartan-3E


I need to generate pseudo-random numbers for my genetic algorithm on a Spartan-3E FPGA and i want to implement it in verilog: could you give me any pointers on this?


Typically you'd use the IEEE.math_real uniform function

use IEEE.math_real.all;  procedure UNIFORM (variable Seed1,Seed2:inout integer; variable X:out real);  

But do a tiny bit a research on pseudo random number generators (PRNGs) and you'll find many variants that are simple LFSR's - which look remarkably similar to CRC generators.

Here are several resources if you want to roll your own starting from existing, working PRNGs:



Here's a CRC VHDL code generator:



Of course the random generator by Adam is not synthesizable! You have to explicitly create an LFSR.

Following example might help. It is an 8-bit maximal LFSR

module lfsr(input clk, reset, en, output reg [7:0] q);    always @(posedge clk or posedge reset) begin      if (reset)        q <= 8'd1; // can be anything except zero      else if (en)        q <= {q[6:0], q[7] ^ q[5] ^ q[4] ^ q[3]}; // polynomial for maximal LFSR    end  endmodule;  


You've already got some good answers, but I'll just point out the canonical guide to LFSRs in FPGAs is here:


It's a bit Xilinx specific in places (which is OK for your FPGA :) but the principles are transferable to others.


There is an online tool that can generate Verilog or VHDL code for a pseudo-random number generator. It's on OutputLogic.com


I agree with the LFSR. I have made one before and it is used for encryption.


The pointer above to OpenCores has a file in the verilog folder called: rng.v

I have used it in a Spartan-3AN and it works great. My code used the random number generator to select a random PWM after I programmed the part and it covered all the selectable PWMs.

Note:If u also have question or solution just comment us below or mail us on toontricks1994@gmail.com
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